Title: Realization of Truth Table of TTL Logic Gates and Verification of De Morgan's Theorem
Abstract
This lab assignment aims to realize the truth tables of various TTL logic gates, including AND, OR, NOT, NAND, NOR, and XOR gates. Additionally, the assignment verifies De Morgan's theorem, which provides a relationship between the logical operations of AND and OR. Understanding these concepts is fundamental in digital electronics.
Introduction
Transistor-Transistor Logic (TTL) is a class of digital circuits built from bipolar junction transistors (BJTs) and resistors. Logic gates are the building blocks of digital circuits, performing basic logical functions. De Morgan's theorem states that the complement of a conjunction is equal to the disjunction of the complements, and vice versa. This assignment focuses on constructing truth tables for TTL gates and verifying De Morgan's theorem.
Objectives
- To realize the truth tables for different TTL logic gates.
- To verify De Morgan's theorem using TTL gates.
Hypothesis
It is expected that the truth tables for the TTL gates will match the standard logical operations, and the verification of De Morgan's theorem will hold true.
Materials and Methods
Materials
- TTL Logic ICs (e.g., 7408 for AND, 7432 for OR, 7404 for NOT, 7400 for NAND, 7402 for NOR, 7486 for XOR)
- Breadboard
- Connecting wires
- Power supply (5V)
- Switches (for inputs)
- LEDs (for outputs)
- Resistors (for current limiting)
- Multimeter (for verification)
Methods
Part 1: Realization of Truth Tables
Construct the Circuit:
- Set up the circuit for each TTL gate on the breadboard.
- Connect the inputs using switches and the outputs to LEDs for visual indication.
Test Each Gate:
- For each gate, apply all possible combinations of inputs (0 and 1) and record the output.
- Create a truth table for each gate based on the observed outputs.
Record Results: Document the truth tables for each gate.
Part 2: Verification of De Morgan's Theorem
Construct the Circuit:
- Set up a circuit to verify De Morgan's theorem using NAND and NOR gates.
- For example, to verify ( \overline{A \cdot B} = \overline{A} + \overline{B} ):
- Use a NAND gate for ( A \cdot B ) and a NOR gate for ( \overline{A} + \overline{B} ).
Test the Circuit:
- Apply all combinations of inputs (0 and 1) and observe the outputs.
- Record the outputs for both sides of the equation.
Record Results: Document the results to verify De Morgan's theorem.
Results
Truth Tables
1. AND Gate (7408)
| A | B | Output (A AND B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
2. OR Gate (7432)
| A | B | Output (A OR B) |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
3. NOT Gate (7404)
| A | Output (NOT A) |
|---|---|
| 0 | 1 |
| 1 | 0 |
4. NAND Gate (7400)
| A | B | Output (A NAND B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
5. NOR Gate (7402)
Truth Table
| A | B | Output (A NOR B) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
